# EESchema Netlist Version 1.1 created  28/05/2011 21:38:57
(
 ( /4CA8A6F2 $noname  U1 74LS00 {Lib=74LS00}
  (    1 /A15 )
  (    2 /A14 )
  (    3 ROM_ACC )
  (    4 /CE )
  (    5 /CE )
  (    6 N-000058 )
  (    7 GND )
  (    8 MATCH )
  (    9 N-000056 )
  (   10 N-000056 )
  (   11 ? )
  (   12 /ACFG )
  (   13 /ACFG )
  (   14 VCC )
 )
 ( /4DE12670 $noname  K1 CONN_3 {Lib=CONN_3}
  (    1 /ACFG )
  (    2 _A3 )
  (    3 ? )
 )
 ( /4DBD84F1 $noname  D11 DIODE {Lib=DIODE}
  (    1 /AC1 )
  (    2 N-000056 )
 )
 ( /4DBD84E4 $noname  D2 DIODE {Lib=DIODE}
  (    1 /AC0 )
  (    2 N-000056 )
 )
 ( /4DBD84DD $noname  D1 DIODE {Lib=DIODE}
  (    1 _A3 )
  (    2 N-000056 )
 )
 ( /4CA89162 $noname  U3 74LS32 {Lib=74LS32}
  (    1 IORQ )
  (    2 WR )
  (    3 N-000002 )
  (    7 GND )
  (    8 /CE )
  (    9 ROMEN )
  (   10 ROM_ACTIVE )
  (   11 ROMSEL )
  (   12 N-000002 )
  (   13 /A13 )
  (   14 VCC )
 )
 ( /4CA871FB $noname  U6 SRAM_512KO {Lib=SRAM_512KO}
  (    1 /A13 )
  (    2 /A11 )
  (    3 /A9 )
  (    4 /A8 )
  (    5 /A7 )
  (    6 /A6 )
  (    7 /A5 )
  (    8 /A4 )
  (    9 /A3 )
  (   10 /A2 )
  (   11 /A0 )
  (   12 /A1 )
  (   13 /D4 )
  (   14 /D2 )
  (   15 /D0 )
  (   16 GND )
  (   17 /D1 )
  (   18 /D3 )
  (   19 /D5 )
  (   20 /D6 )
  (   21 /D7 )
  (   22 /CE )
  (   23 /AX17 )
  (   24 /RD )
  (   25 /AX18 )
  (   26 /IS2 )
  (   27 /IS1 )
  (   28 /IS0 )
  (   29 WR )
  (   30 /A10 )
  (   31 /A12 )
  (   32 VCC )
 )
 ( /4CA87152 $noname  C4 C {Lib=C}
  (    1 VCC )
  (    2 GND )
 )
 ( /4CA87151 $noname  C3 C {Lib=C}
  (    1 VCC )
  (    2 GND )
 )
 ( /4CA87146 $noname  C5 CP1 {Lib=CP1}
  (    1 VCC )
  (    2 GND )
 )
 ( /4CA8712F $noname  P1 CONN_25X2 {Lib=CONN_25X2}
  (    1 ? )
  (    2 ? )
  (    3 /A15 )
  (    4 /A14 )
  (    5 /A13 )
  (    6 /A12 )
  (    7 /A11 )
  (    8 /A10 )
  (    9 /A9 )
  (   10 /A8 )
  (   11 /A7 )
  (   12 /A6 )
  (   13 /A5 )
  (   14 /A4 )
  (   15 /A3 )
  (   16 /A2 )
  (   17 /A1 )
  (   18 /A0 )
  (   19 /D7 )
  (   20 /D6 )
  (   21 /D5 )
  (   22 /D4 )
  (   23 /D3 )
  (   24 /D2 )
  (   25 /D1 )
  (   26 /D0 )
  (   27 VCC )
  (   28 MREQ )
  (   29 ? )
  (   30 ? )
  (   31 IORQ )
  (   32 /RD )
  (   33 WR )
  (   34 ? )
  (   35 ? )
  (   36 ? )
  (   37 ? )
  (   38 ? )
  (   39 ? )
  (   40 ? )
  (   41 ? )
  (   42 ROMEN )
  (   43 ROMDIS )
  (   44 ? )
  (   45 ? )
  (   46 ? )
  (   47 ? )
  (   48 ? )
  (   49 GND )
  (   50 ? )
 )
 ( /4CA870EF $noname  C2 C {Lib=C}
  (    1 VCC )
  (    2 GND )
 )
 ( /4CA870D9 $noname  R2 10KR {Lib=R}
  (    1 N-000056 )
  (    2 GND )
 )
 ( /4CA870C2 $noname  R8 R {Lib=R}
  (    1 VCC )
  (    2 ROM_ACTIVE )
 )
 ( /4CA870AA $noname  D13 DIODE {Lib=DIODE}
  (    1 N-000058 )
  (    2 ROMDIS )
 )
 ( /4CA8709A $noname  D10 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000059 )
 )
 ( /4CA87098 $noname  D9 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000060 )
 )
 ( /4CA87095 $noname  D8 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000061 )
 )
 ( /4CA87093 $noname  D7 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000062 )
 )
 ( /4CA87092 $noname  D6 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000063 )
 )
 ( /4CA87090 $noname  D5 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000014 )
 )
 ( /4CA8708D $noname  D4 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000016 )
 )
 ( /4CA87086 $noname  D3 DIODE {Lib=DIODE}
  (    1 ROM_ACTIVE )
  (    2 N-000017 )
 )
 ( /4CA8706E $noname  SW_ROMEN1 DIPS_08 {Lib=DIPS_08}
  (    1 N-000027 )
  (    2 N-000026 )
  (    3 N-000025 )
  (    4 N-000024 )
  (    5 N-000023 )
  (    6 N-000022 )
  (    7 N-000021 )
  (    8 N-000020 )
  (    9 N-000059 )
  (   10 N-000060 )
  (   11 N-000061 )
  (   12 N-000062 )
  (   13 N-000063 )
  (   14 N-000014 )
  (   15 N-000016 )
  (   16 N-000017 )
 )
 ( /4CA86E68 $noname  U4 74LS374 {Lib=74LS374}
  (    1 GND )
  (    2 /AC0 )
  (    3 /D6 )
  (    4 /D5 )
  (    5 /AX18 )
  (    6 /ACFG )
  (    7 /D3 )
  (    8 /D0 )
  (    9 /IS0 )
  (   10 GND )
  (   11 ROMSEL )
  (   12 /IS1 )
  (   13 /D1 )
  (   14 /D2 )
  (   15 /IS2 )
  (   16 /AX17 )
  (   17 /D4 )
  (   18 /D7 )
  (   19 /AC1 )
  (   20 VCC )
 )
 ( /4CA86E2A $noname  U2 74LS138 {Lib=74LS138}
  (    1 /IS0 )
  (    2 /IS1 )
  (    3 /IS2 )
  (    4 MREQ )
  (    5 ROM_ACC )
  (    6 MATCH )
  (    7 N-000020 )
  (    8 GND )
  (    9 N-000021 )
  (   10 N-000022 )
  (   11 N-000023 )
  (   12 N-000024 )
  (   13 N-000025 )
  (   14 N-000026 )
  (   15 N-000027 )
  (   16 VCC )
 )
)
*
{ Allowed footprints by component:
$component U1
 14DIP300*
 SO14*
$endlist
$component D11
 D?
 S*
$endlist
$component D2
 D?
 S*
$endlist
$component D1
 D?
 S*
$endlist
$component C4
 SM*
 C?
 C1-1
$endlist
$component C3
 SM*
 C?
 C1-1
$endlist
$component C5
 CP*
 SM*
$endlist
$component C2
 SM*
 C?
 C1-1
$endlist
$component R2
 R?
 SM0603
 SM0805
 R?-*
 SM1206
$endlist
$component R8
 R?
 SM0603
 SM0805
 R?-*
 SM1206
$endlist
$component D13
 D?
 S*
$endlist
$component D10
 D?
 S*
$endlist
$component D9
 D?
 S*
$endlist
$component D8
 D?
 S*
$endlist
$component D7
 D?
 S*
$endlist
$component D6
 D?
 S*
$endlist
$component D5
 D?
 S*
$endlist
$component D4
 D?
 S*
$endlist
$component D3
 D?
 S*
$endlist
$endfootprintlist
}
{ Pin List by Nets
Net 1 "ROMSEL" "ROMSEL"
 U4 11
 U3 11
Net 2 "" ""
 U3 3
 U3 12
Net 3 "/AX17" "AX17"
 U6 23
 U4 16
Net 4 "/RD" "RD"
 P1 32
 U6 24
Net 5 "/AX18" "AX18"
 U4 5
 U6 25
Net 6 "/IS2" "IS2"
 U4 15
 U2 3
 U6 26
Net 7 "/IS0" "IS0"
 U6 28
 U4 9
 U2 1
Net 8 "/A11" "A11"
 P1 7
 U6 2
Net 9 "/CE" "CE"
 U1 5
 U1 4
 U6 22
 U3 8
Net 10 "WR" "WR"
 U3 2
 U6 29
 P1 33
Net 11 "ROMEN" "ROMEN"
 P1 42
 U3 9
Net 12 "GND" "GND"
 C5 2
 U2 8
 U4 1
 U4 10
 U6 16
 U1 7
 U3 7
 C2 2
 P1 49
 R2 2
 C3 2
 C4 2
Net 13 "/D0" "D0"
 U6 15
 U4 8
 P1 26
Net 14 "" ""
 SW_ROMEN1 14
 D5 2
Net 15 "ROM_ACTIVE" "ROM_ACTIVE"
 D5 1
 D6 1
 D7 1
 D8 1
 D9 1
 D10 1
 R8 2
 U3 10
 D4 1
 D3 1
Net 16 "" ""
 SW_ROMEN1 15
 D4 2
Net 17 "" ""
 SW_ROMEN1 16
 D3 2
Net 18 "MREQ" "MREQ"
 P1 28
 U2 4
Net 19 "ROM_ACC" "ROM_ACC"
 U1 3
 U2 5
Net 20 "" ""
 SW_ROMEN1 8
 U2 7
Net 21 "" ""
 SW_ROMEN1 7
 U2 9
Net 22 "" ""
 U2 10
 SW_ROMEN1 6
Net 23 "" ""
 U2 11
 SW_ROMEN1 5
Net 24 "" ""
 U2 12
 SW_ROMEN1 4
Net 25 "" ""
 U2 13
 SW_ROMEN1 3
Net 26 "" ""
 U2 14
 SW_ROMEN1 2
Net 27 "" ""
 U2 15
 SW_ROMEN1 1
Net 28 "/IS1" "IS1"
 U6 27
 U2 2
 U4 12
Net 30 "/A6" "A6"
 U6 6
 P1 12
Net 31 "/D4" "D4"
 P1 22
 U4 17
 U6 13
Net 32 "/A5" "A5"
 P1 13
 U6 7
Net 33 "/D3" "D3"
 P1 23
 U4 7
 U6 18
Net 34 "ROMDIS" "ROMDIS"
 P1 43
 D13 2
Net 35 "/A4" "A4"
 U6 8
 P1 14
Net 36 "/D2" "D2"
 P1 24
 U4 14
 U6 14
Net 39 "/A3" "A3"
 U6 9
 P1 15
Net 40 "/D1" "D1"
 U6 17
 U4 13
 P1 25
Net 45 "/A12" "A12"
 P1 6
 U6 31
Net 46 "/A10" "A10"
 U6 30
 P1 8
Net 47 "/A9" "A9"
 P1 9
 U6 3
Net 48 "/A8" "A8"
 P1 10
 U6 4
Net 49 "/D6" "D6"
 P1 20
 U6 20
 U4 3
Net 53 "/A7" "A7"
 U6 5
 P1 11
Net 54 "/D5" "D5"
 U6 19
 P1 21
 U4 4
Net 55 "IORQ" "IORQ"
 U3 1
 P1 31
Net 56 "" ""
 U1 10
 D1 2
 D2 2
 R2 1
 U1 9
 D11 2
Net 57 "VCC" "VCC"
 U6 32
 U3 14
 C4 1
 C3 1
 C5 1
 U2 16
 R8 1
 U4 20
 C2 1
 U1 14
 P1 27
Net 58 "" ""
 U1 6
 D13 1
Net 59 "" ""
 D10 2
 SW_ROMEN1 9
Net 60 "" ""
 SW_ROMEN1 10
 D9 2
Net 61 "" ""
 D8 2
 SW_ROMEN1 11
Net 62 "" ""
 SW_ROMEN1 12
 D7 2
Net 63 "" ""
 D6 2
 SW_ROMEN1 13
Net 64 "/A2" "A2"
 U6 10
 P1 16
Net 67 "/A1" "A1"
 U6 12
 P1 17
Net 70 "/A0" "A0"
 P1 18
 U6 11
Net 73 "/D7" "D7"
 P1 19
 U4 18
 U6 21
Net 78 "/AC0" "AC0"
 U4 2
 D2 1
Net 79 "MATCH" "MATCH"
 U1 8
 U2 6
Net 80 "/AC1" "AC1"
 D11 1
 U4 19
Net 81 "_A3" "_A3"
 K1 2
 D1 1
Net 82 "/A15" "A15"
 U1 1
 P1 3
Net 83 "/A14" "A14"
 U1 2
 P1 4
Net 84 "/A13" "A13"
 U3 13
 U6 1
 P1 5
Net 85 "/ACFG" "ACFG"
 U4 6
 U1 12
 U1 13
 K1 1
}
#End