|Version 1 (modified by 7 months ago) ( diff ),
Currently using some random SD image I found on the web. It does not have audio and ethernet. It is from 2017, so the next step is to build a newer one.
Upstream uboot and Linux should work fine.
The LCD videomode is currently configured statically with an uboot build option CONFIG_VIDEO_LCD_MODE. This needs to be tweaked to support VGA output using the LCD IO pins, mainly the hsync needs to be a lot wider than it would be for LCDs (about 20% of the horizontal total according to the VESA GTF, but modern VGA can probably get away with less than that).
TODO: it would be great if this was settable from uboot environment instead of having to rebuild. It is possible to edit it directly in the SD image with a hex editor however, so that's better than nothing.
For doing SCART, the hsync/vsync needs to be turned into a composite sync (that's just a XOR of the two signals). I put a +5V line on the VGA output so I can power a chip doing the XOR in the SCART adapter (and also power DDC lines on VGA displays). I have to check if the LCD driver accepts doing such lowres things.
- https://github.com/Lichee-Pi/u-boot/commit/cd94d29394aa0259e071da36abb278c6aa00fe05 (possibly useful for device trees?)
- https://licheepizero.us/build--uboot-for-licheepi-zero (expired certificate, should mirror this before it goes offline...)
- https://wiki.sipeed.com/hardware/en/lichee/Zero/Zero.html not much useful docs from the current manufacturer
- https://hackaday.io/project/134065-funkey-zero another project using the Lichee Pi Zero
- https://whycan.com/t_9212.html chinese forum with large Allwinner V3 community
Other interesting CPUs
In QFP packages:
- Allwinner V3lp: new pin compatible (?) version with low voltage RAM
- Allwinner V3x: new version of the V3s with more RAM (not pin compatible)
- Allwinner T113: dual core CPU, also has embedded RAM
- Allwinner D1 for RISC-V fun (sipeed has a system on module for it already)