Changes between Version 1 and Version 2 of vtech/z80


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Timestamp:
Jun 4, 2022, 2:27:06 PM (23 months ago)
Author:
pulkomandy
Comment:

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  • vtech/z80

    v1 v2  
    22
    33These notes are derived from the work of https://github.com/fraser125/PreTech/blob/main/Schematic/prc1000.pdf who reverse engineered the schematics by tracing pictures of the PCB. The PreComputer 1000 is simple enough and uses standard components, so from this tracing we can learn a lot about how the machine works.
     4
     5Several later VTech machines seem to have a compatible cartridge port, however it isn't known how far the compatibility goes in terms of memory banks, etc.
    46
    57== IO decoding ==
     
    2931For each line, the status of 8 keys will be read in the destination register of the IN instruction.
    3032
    31 === 4xxx-7xxx: TODO ===
     33=== 4xxx-7xxx: LCD display ===
    3234
    3335The address bits A0-A3 are stored in a latch, but it isn't known yet what they are used for (STROBE_A -> IC1A in the schematics)
     36
     37The A8 pin is used to determine if it's a read or write, which gives the nominal addresses: 40xx for a write, and 41xx for a read of the LCD.
     38
     39Only 4 data bits are used, bits D0-D3. The protocol is typical https://fr.wikipedia.org/wiki/HD44780
     40
     41TODO the wiring of the LCD is not fully documented and it's not known how the RS and E lines are controlled.
    3442
    3543=== 8xxx-Bxxx: Memory banks configuration ===
     
    4250* D1, D2: High memory bank selection
    4351* D3: Cartridge enable
     52
     53=== Cxxx-Fxxx: reserved for cartridge ===
     54
     55IN and OUT instructions in this space result in enabling the CART_IORQ signal which is routed to the cartridge port (C2_17 pin). A cartridge could make use of this to add extra IO mapped hardware to the computer.
     56
     57== Memory space ==
     58
     59Memory accesses are split in 3 areas also depending on the A14-A15 address lines.
     60
     61=== 0xxx-3xxx: "Low" ROM ===
     62
     63This is mapped to either the first or second 16K of the BIOS, depending on D0 bit of the memory bank configuration.
     64
     65=== 4xxx-7xxx: Internal RAM ===
     66
     67This is the 16K of internal RAM
     68
     69=== 8xxx-Fxxx: "High" ROM or cartridge ===
     70
     71This 32K space allows to access either the internal ROM or the cartridge depending on the state of memory bank configuration bit D3.
     72
     73One of 4 32K pages can be selected using bits D2 and D1 of the memory bank config. As a result, this can access up to 128K of data in the internal ROM, and an extra 128K in the cartridge, which can be either ROM or RAM.