Index: V-USB_Dev/circuit/V-USB Dev.net
===================================================================
--- V-USB_Dev/circuit/V-USB Dev.net	(revision 03d5724c01ed1e1ffe6e3ff9691353e88d50eaf8)
+++ V-USB_Dev/circuit/V-USB Dev.net	(revision 03d5724c01ed1e1ffe6e3ff9691353e88d50eaf8)
@@ -0,0 +1,287 @@
+# EESchema Netlist Version 1.1 created  05/12/2011 22:48:10
+(
+ ( /4EDD3903 $noname  D1 DOUBLE_LED {Lib=DOUBLE_LED}
+  (    1 N-000024 )
+  (    2 +5V )
+  (    3 N-000018 )
+ )
+ ( /4EDD28E4 $noname  SW1 DIPS_04 {Lib=DIPS_04}
+  (    1 /SW0 )
+  (    2 /SW1 )
+  (    3 /SW2 )
+  (    4 /SW3 )
+  (    5 GND )
+  (    6 GND )
+  (    7 GND )
+  (    8 GND )
+ )
+ ( /4CB98E65 CONN_14  P1 CONN_12 {Lib=CONN_14}
+  (    1 J3B )
+  (    2 J3D )
+  (    3 J2B )
+  (    4 J2D )
+  (    5 J1B )
+  (    6 J1D )
+  (    7 GND )
+  (    8 +5V )
+  (    9 B6 )
+  (   10 B5 )
+  (   11 B4 )
+  (   12 B3 )
+  (   13 B2 )
+  (   14 B1 )
+ )
+ ( /4C52C709 $noname  C5 10µF {Lib=CP1}
+  (    1 +5V )
+  (    2 GND )
+ )
+ ( /4C21F047 $noname  D4 3.6V {Lib=ZENER}
+  (    1 GND )
+  (    2 N-000001 )
+ )
+ ( /4C21F044 $noname  D3 3.6V {Lib=ZENER}
+  (    1 GND )
+  (    2 N-000002 )
+ )
+ ( /4C21F015 $noname  R4 2.2KR {Lib=R}
+  (    1 +5V )
+  (    2 N-000002 )
+ )
+ ( /4C21EFE9 $noname  R7 68R {Lib=R}
+  (    1 N-000001 )
+  (    2 USB_D+ )
+ )
+ ( /4C21EFE5 $noname  R6 68R {Lib=R}
+  (    1 N-000002 )
+  (    2 USB_D- )
+ )
+ ( /4C21EF7A $noname  USB1 CONN_4 {Lib=CONN_4}
+  (    1 +5V )
+  (    2 N-000002 )
+  (    3 N-000001 )
+  (    4 GND )
+ )
+ ( /4C20B56F $noname  C4 100nF {Lib=C}
+  (    1 GND )
+  (    2 +5V )
+ )
+ ( /4C20B267 $noname  R1 10K {Lib=R}
+  (    1 RESET )
+  (    2 +5V )
+ )
+ ( /4C20AD73 $noname  C2 27pF {Lib=C}
+  (    1 N-000023 )
+  (    2 GND )
+ )
+ ( /4C20AD6D $noname  C1 27pF {Lib=C}
+  (    1 N-000022 )
+  (    2 GND )
+ )
+ ( /4C20AD34 $noname  X1 16MHz {Lib=CRYSTAL}
+  (    1 N-000022 )
+  (    2 N-000023 )
+ )
+ ( /4C209A59 DIP-28__300  IC1 ATMEGA8-P {Lib=ATMEGA8-P}
+  (    1 RESET )
+  (    2 /SW3 )
+  (    3 /SW2 )
+  (    4 USB_D+ )
+  (    5 /SW1 )
+  (    6 /SW0 )
+  (    7 +5V )
+  (    8 GND )
+  (    9 N-000022 )
+  (   10 N-000023 )
+  (   11 USB_D- )
+  (   12 N-000018 )
+  (   13 N-000024 )
+  (   14 B1 )
+  (   15 B2 )
+  (   16 B3 )
+  (   17 B4 )
+  (   18 B5 )
+  (   19 B6 )
+  (   20 +5V )
+  (   21 ? )
+  (   22 GND )
+  (   23 J1B )
+  (   24 J1D )
+  (   25 J2B )
+  (   26 J2D )
+  (   27 J3B )
+  (   28 J3D )
+ )
+)
+*
+{ Allowed footprints by component:
+$component C5
+ CP*
+ SM*
+$endlist
+$component D4
+ D?
+ SO*
+ SM*
+$endlist
+$component D3
+ D?
+ SO*
+ SM*
+$endlist
+$component R4
+ R?
+ SM0603
+ SM0805
+ R?-*
+ SM1206
+$endlist
+$component R7
+ R?
+ SM0603
+ SM0805
+ R?-*
+ SM1206
+$endlist
+$component R6
+ R?
+ SM0603
+ SM0805
+ R?-*
+ SM1206
+$endlist
+$component C4
+ SM*
+ C?
+ C1-1
+$endlist
+$component R1
+ R?
+ SM0603
+ SM0805
+ R?-*
+ SM1206
+$endlist
+$component C2
+ SM*
+ C?
+ C1-1
+$endlist
+$component C1
+ SM*
+ C?
+ C1-1
+$endlist
+$component IC1
+ 28DIP-ELL600
+ 28dip600
+$endlist
+$endfootprintlist
+}
+{ Pin List by Nets
+Net 1 "" ""
+ R7 1
+ USB1 3
+ D4 2
+Net 2 "" ""
+ R6 1
+ R4 2
+ D3 2
+ USB1 2
+Net 3 "+5V" "+5V"
+ USB1 1
+ IC1 20
+ IC1 7
+ D1 2
+ R1 2
+ C4 2
+ C5 1
+ P1 8
+ R4 1
+Net 4 "GND" "GND"
+ C5 2
+ D4 1
+ D3 1
+ C1 2
+ USB1 4
+ C2 2
+ C4 1
+ SW1 8
+ SW1 7
+ SW1 6
+ P1 7
+ IC1 8
+ SW1 5
+ IC1 22
+Net 5 "J3D" "J3D"
+ P1 2
+ IC1 28
+Net 6 "J2D" "J2D"
+ P1 4
+ IC1 26
+Net 7 "J2B" "J2B"
+ P1 3
+ IC1 25
+Net 8 "J1D" "J1D"
+ P1 6
+ IC1 24
+Net 9 "J1B" "J1B"
+ IC1 23
+ P1 5
+Net 10 "B6" "B6"
+ P1 9
+ IC1 19
+Net 11 "B5" "B5"
+ P1 10
+ IC1 18
+Net 12 "B4" "B4"
+ P1 11
+ IC1 17
+Net 13 "B3" "B3"
+ P1 12
+ IC1 16
+Net 14 "B2" "B2"
+ IC1 15
+ P1 13
+Net 15 "B1" "B1"
+ IC1 14
+ P1 14
+Net 16 "J3B" "J3B"
+ P1 1
+ IC1 27
+Net 18 "" ""
+ D1 3
+ IC1 12
+Net 19 "USB_D-" "USB_D-"
+ IC1 11
+ R6 2
+Net 20 "USB_D+" "USB_D+"
+ IC1 4
+ R7 2
+Net 21 "RESET" "RESET"
+ R1 1
+ IC1 1
+Net 22 "" ""
+ IC1 9
+ C1 1
+ X1 1
+Net 23 "" ""
+ C2 1
+ X1 2
+ IC1 10
+Net 24 "" ""
+ D1 1
+ IC1 13
+Net 25 "/SW0" "SW0"
+ IC1 6
+ SW1 1
+Net 26 "/SW1" "SW1"
+ IC1 5
+ SW1 2
+Net 27 "/SW2" "SW2"
+ IC1 3
+ SW1 3
+Net 28 "/SW3" "SW3"
+ IC1 2
+ SW1 4
+}
+#End
