The Motorola 6809

The 6809 is a binary-incompatible evolution of the previous 68xx series CPU. Often designed the “best 8-bit CPU of all times”, it prefigures some of the features that will make the 68000 a success.

Technical description


  • A and B: two 8-bit accumulators, useable as the 16-bit D
  • X and Y: two index registers, used as memory pointers
  • U and S: user and system stacks
  • CC: condition flags register
  • DP: direct-page pointer

Instruction set and addressing modes

This is already covered elsewhere on the internet. Do I need to repeat everything?


  • Reset: at system reset.
  • NMI: non-maskable.
  • IRQ: all registers are saved on the stack before processing the interrupt.
  • FIQ: Only PC and CC are saved (faster than IRQ, but needs manual save of registers used in the IRQ handler).
  • SWI1, 2, and 3: software interrupts triggered by the SWI instructions. (On Thomson machines with standard ROM, only SWI1 is useable, the others are hardcoded to do nothing).

The 6809 interrupts fetch an address from memory, and jumps to it. The interrupt table is at a fixed address at the top of memory:

  • FFF2: SWI3
  • FFF4: SWI2
  • FFF6: FIRQ
  • FFF8: IRQ
  • FFFE: Reset


documentations/devices/6809.txt · Last modified: 2015/02/28 18:08 by
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