| vsc - scheduler for vbcc (c) in 1997-99 by Volker Barthelmann |
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| @section Introduction |
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| vsc is an instruction-scheduler which reorders the assembly output of |
| vbcc and tries to improve performance of the generated code by avoiding |
| pipeline stalls etc. |
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| Like the compiler vbcc it is split into a target independent and a |
| target dependent part. However there may be code-generators for vbcc |
| which do not have a corresponding scheduler. |
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| This document only deals with the target independent parts of vsc. |
| Be sure to read all the documents for your machine. |
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| @section Usage |
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| Usually @command{vsc} will be called by a frontend. However if you call it |
| directly, it has to be done like this: |
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| @example |
| vsc [options] input-file output-file |
| @end example |
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| The following options are supported: |
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| @table @option |
| @item -quiet |
| Do not print the copyright notice. |
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| @item -debug=<n> |
| Set debug-level to <n>. |
| @end table |
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| Note that depending on the target @command{vbcc} may insert hints into the |
| generated code to tell vsc what CPU to schedule for. Code |
| scheduled for a certain CPU may run much slower on slightly different |
| CPUs. Therefore it is especially important to specify the correct |
| target-CPU when compiling. |
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| @section Known problems |
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| @itemize @minus |
| @item works only on basic-blocks |
| @end itemize |
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