source: avrstuff/EPRoxygen/device.h@ 34c57e8

main
Last change on this file since 34c57e8 was 34c57e8, checked in by Adrien Destugues <pulkomandy@…>, 12 years ago

More work.

  • Power on/off sequence OK
  • Code to read chip ID written, but not working yet...

git-svn-id: svn://pulkomandy.tk/avrstuff@59 c6672c3c-f6b6-47f9-9001-1fd6b12fecbe

  • Property mode set to 100644
File size: 2.3 KB
Line 
1#ifndef _DEVICE_H_
2#define _DEVICE_H_
3
4#pragma once
5
6#include <errno.h>
7#include <stdio.h>
8#include <stdint.h>
9
10// FreeBSD
11#include <sys/types.h>
12#include <machine/cpufunc.h>
13#include <machine/sysarch.h>
14
15
16class Device {
17 public:
18 Device()
19 {};
20
21 void shutdown();
22 virtual void power() = 0;
23
24 virtual void read(const char* file) = 0;
25 virtual void write(const char* file) = 0;
26 virtual void erase(void) = 0;
27
28 int setup(const int port_base) {
29 port = port_base;
30 if (i386_set_ioperm(port_base, 3, true) != 0)
31 {
32 perror("Unable to get access to parallel port");
33 return errno;
34 }
35 shutdown();
36
37 return 0;
38 }
39
40 virtual ~Device() {};
41
42 protected:
43 typedef enum {
44 NONE = 0b0101, /* Nothing selected */
45 NYBLE = 0b0010, /* Read low nyble */
46 /* When 0, status reg shows D0.3
47 * When 1, status reg shows D4.7
48 */
49 CTRL = 0b0011, /* Control reg. */
50 /* b0: A16
51 * b1: /A17
52 * b2: WE
53 * b3: A18
54 * b4: OE
55 * b5: VPP on pin 25 (0 = enable)
56 * b6: VPP on pin 24 (0 = enable)
57 * b7: CE
58 */
59 VOLT = 0b0110, /* Power config reg. */
60 /* b0: VPP on pin 1 (0 = enable)
61 * b1: VPP on pin 3 (0 = enable)
62 * b2: VCC on pin 32 (0 = enable)
63 * b3: Data reg. output enable (and green led)
64 * b4: VPP config
65 * b5: VPP config
66 * 00 = 24V
67 * 01 = ??
68 * 10 = ??
69 * 11 = 12V
70 * b6: Address reg. output enable
71 * b7: VCC enable (1 = power ON)
72 */
73 ADR0 = 0b1011, /* Low address byte A0.7 */
74 DATA = 0b1110, /* Data byte */
75 ADR1 = 0b1111, /* High address byte A8.15 */
76 } Register;
77
78 typedef enum {
79 A16 = 1,
80 A17 = 2,
81 WE = 4,
82 A18 = 8,
83 OE = 16,
84 VPP25 = 32,
85 VPP24 = 64,
86 CE = 128
87 } CTRLbits;
88
89 typedef enum {
90 VPP1 = 1,
91 VPP3 = 2,
92 VCC32 = 4,
93 DOE = 8,
94
95 V24 = 0,
96 V12 = 48,
97
98 AOE = 64,
99 VCC30 = 128
100 } VOLTbits;
101
102 static inline void write(const Register reg, const uint8_t val)
103 {
104 // The register latches the data only when another register gets
105 // selected. If this is a problem, select the NONE reg after
106 // writing !
107 outb(port + 2, reg);
108 outb(port, val);
109 }
110
111 static inline uint8_t read()
112 {
113 uint8_t byte = (inb(port + 1) ^ 0x80) & 0xF0;
114
115 outb(port+2, NYBLE);
116 byte |= (inb(port + 1) ^ 0x80) >> 4;
117 return byte;
118 }
119
120 private:
121 static int port;
122};
123
124#endif
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