[1fabcce] | 1 | #include <avr/io.h>
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| 2 | #include <avr/interrupt.h>
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| 3 | #include <avr/wdt.h>
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| 4 | #include <avr/pgmspace.h>
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| 5 | #include <util/delay.h>
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| 6 |
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| 7 | #include <string.h>
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| 8 | #include <stdbool.h>
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| 9 |
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| 10 | #include "usbdrv/usbdrv.h"
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| 11 |
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[4af90bf] | 12 | static uint8_t ioblock[275]; // Max. Size of an MO5 standard block including sync header
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| 13 | static uint8_t status; // status bits
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| 14 | static uint16_t writePos;
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| 15 | static uint16_t blksz;
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[1fabcce] | 16 |
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[4af90bf] | 17 | static uint16_t readPos;
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| 18 | static uint8_t bitpos;
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| 19 | static uint8_t bit; // Currently generated bit
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[1fabcce] | 20 |
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[4af90bf] | 21 | int main() {
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| 22 | // Init
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| 23 | status = 0;
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| 24 | writePos = 0;
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| 25 | blksz = 0;
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[1fabcce] | 26 |
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| 27 | wdt_enable(WDTO_2S);
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| 28 |
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| 29 | // USB
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| 30 | usbInit();
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| 31 | sei();
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| 32 |
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[4af90bf] | 33 | bit = 1;
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| 34 | bitpos = 0;
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| 35 | readPos = 0;
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[1fabcce] | 36 |
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[e07597b] | 37 | // Generate sync header (this never changes)
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| 38 | int i;
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| 39 | for (i = 0; i< 16; i++)
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| 40 | {
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| 41 | ioblock[i] = 1;
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| 42 | }
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| 43 | ioblock[i++] = 0x3C;
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| 44 | ioblock[i++] = 0x5A;
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| 45 |
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| 46 | // HEAD block
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| 47 | ioblock[i++] = 0x0;
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| 48 | ioblock[i++] = 0x10;
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| 49 |
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| 50 | int j = i;
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| 51 | ioblock[i++] = 'C';
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| 52 | ioblock[i++] = 'r';
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| 53 | ioblock[i++] = 'O';
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| 54 | ioblock[i++] = '2';
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| 55 | ioblock[i++] = ' ';
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| 56 | ioblock[i++] = ' ';
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| 57 | ioblock[i++] = ' ';
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| 58 | ioblock[i++] = ' ';
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| 59 | ioblock[i++] = 'B';
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| 60 | ioblock[i++] = 'A';
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| 61 | ioblock[i++] = 'S';
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| 62 | ioblock[i++] = 0;
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| 63 | ioblock[i++] = 0;
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| 64 | ioblock[i++] = 0;
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| 65 | uint8_t s = 0;
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| 66 | for (;j<i;j++) s -= ioblock[j];
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| 67 | ioblock[i++] = s;
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| 68 |
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| 69 |
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[4af90bf] | 70 | // Setup TIMER 1 for MFM pulses generation
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| 71 | TCCR1A = (1<<COM1A0); // Enable OC1A output
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[e07597b] | 72 | TCCR1A |= (1<<COM1A1); // Compare match will always SET OC1A instead of toggling it. Thus the output is always high.
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[4af90bf] | 73 | // CTC mode with OCR1A as MAXregister
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[e07597b] | 74 | TCCR1B = (1<<WGM12);
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[4af90bf] | 75 | OCR1A = 12800; // 800us bit clock
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| 76 | OCR1B = 6400; // Half-clock for 1 bits
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| 77 | TIMSK = (1 << OCIE1B) | (1 << OCIE1A); // interrupts on both timer matches.
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[e07597b] | 78 | TCCR1A |= (bit << FOC1A); // Force toggle of A (make sure output is a logic 1 to allow MO5 to detect tapedrive)
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[4af90bf] | 79 |
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| 80 | DDRB |= 2; // OC1A/PB1 as output
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[1fabcce] | 81 |
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| 82 |
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| 83 | while(1) {
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| 84 | wdt_reset();
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| 85 | usbPoll();
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[e07597b] | 86 | // TODO watch for motor on/off
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[1fabcce] | 87 | }
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| 88 | }
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| 89 |
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| 90 |
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[4af90bf] | 91 | uint8_t usbFunctionSetup(uint8_t data[8]) {
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| 92 | usbRequest_t *rq = (void *)data;
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| 93 |
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| 94 | usbMsgPtr = ioblock;
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| 95 | switch(rq->bRequest)
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| 96 | {
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| 97 | case 0:
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| 98 | { /* CONFIGURE */
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| 99 | status = rq->wValue.bytes[0];
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| 100 | return 0;
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| 101 | }
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| 102 | case 1:
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| 103 | { /* RECEIVE/POLL DATA (TAPE > USB) */
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| 104 | return 254;
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| 105 | }
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| 106 | case 2:
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| 107 | {
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| 108 | /* SEND DATA (USB > TAPE) */
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| 109 | /* Get ready, actual data will come in usbFunctionWrite */
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| 110 | // TODO store type of MO5 block + size in ioblock
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| 111 | writePos = 0;
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| 112 | blksz = rq->wLength.word;
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| 113 | return USB_NO_MSG; // Call usbFunctionWrite to send the data
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| 114 | }
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| 115 | }
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| 116 | return 0;
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| 117 | }
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[1fabcce] | 118 |
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[4af90bf] | 119 | uint8_t usbFunctionWrite(uint8_t* data, uint8_t len)
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| 120 | {
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| 121 | // The data for a single request will be sent as slices of up to 8 bytes.
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| 122 | for (int i = 0; i < len; i++)
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| 123 | {
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| 124 | // TODO leave place for sync header and block type+size
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[e07597b] | 125 | // ioblock[writePos] = data[i];
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| 126 | writePos++;
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[4af90bf] | 127 | }
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[1fabcce] | 128 |
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[4af90bf] | 129 | // TODO compute checksum as we go
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[1fabcce] | 130 |
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[e07597b] | 131 | if (writePos >= blksz)
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| 132 | {
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| 133 | // start generating
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| 134 | TCCR1A &= ~(1<<COM1A1);
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| 135 | TCCR1B |= (1<<CS10);
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| 136 | return 1;
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| 137 | } else {
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| 138 | return 0;
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| 139 | }
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[4af90bf] | 140 | // returns 0: "needs more data"
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| 141 | // returns 1: "done"
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| 142 | // returns FF: "error"
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[1fabcce] | 143 | }
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| 144 |
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[e07597b] | 145 | ISR (TIMER1_COMPA_vect, ISR_NOBLOCK)
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[4af90bf] | 146 | {
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| 147 | // generate next bit
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| 148 | bit = (ioblock[readPos] >> bitpos) & 1;
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| 149 | bitpos++;
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| 150 | if (bitpos > 7)
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| 151 | {
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| 152 | bitpos = 0;
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| 153 | readPos++;
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[e07597b] | 154 | if (readPos > blksz)
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| 155 | {
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| 156 | // Make sure output is high
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| 157 | TCCR1A |= (1<<COM1A1);
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| 158 | // Stop generating (and interrupts)
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| 159 | TCCR1B &= ~(1<<CS10);
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| 160 | readPos = 0;
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| 161 | TCCR1A |= (1 << FOC1A);
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| 162 | }
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[4af90bf] | 163 | }
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[1fabcce] | 164 | }
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| 165 |
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[e07597b] | 166 | ISR (TIMER1_COMPB_vect, ISR_NOBLOCK)
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[4af90bf] | 167 | {
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| 168 | TCCR1A |= (bit << FOC1A); // Force toggle of A on B compare when generating a 1 bit
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| 169 | }
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