1 | /* Name: asmcommon.inc
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2 | * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
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3 | * Author: Christian Starkjohann
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4 | * Creation Date: 2007-11-05
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5 | * Tabsize: 4
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6 | * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
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7 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
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8 | * Revision: $Id$
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9 | */
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10 |
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11 | /* Do not link this file! Link usbdrvasm.S instead, which includes the
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12 | * appropriate implementation!
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13 | */
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14 |
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15 | /*
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16 | General Description:
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17 | This file contains assembler code which is shared among the USB driver
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18 | implementations for different CPU cocks. Since the code must be inserted
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19 | in the middle of the module, it's split out into this file and #included.
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20 |
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21 | Jump destinations called from outside:
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22 | sofError: Called when no start sequence was found.
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23 | se0: Called when a package has been successfully received.
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24 | overflow: Called when receive buffer overflows.
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25 | doReturn: Called after sending data.
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26 |
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27 | Outside jump destinations used by this module:
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28 | waitForJ: Called to receive an already arriving packet.
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29 | sendAckAndReti:
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30 | sendNakAndReti:
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31 | sendCntAndReti:
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32 | usbSendAndReti:
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33 |
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34 | The following macros must be defined before this file is included:
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35 | .macro POP_STANDARD
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36 | .endm
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37 | .macro POP_RETI
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38 | .endm
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39 | */
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40 |
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41 | #define token x1
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42 |
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43 | overflow:
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44 | ldi x2, 1<<USB_INTR_PENDING_BIT
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45 | USB_STORE_PENDING(x2) ; clear any pending interrupts
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46 | ignorePacket:
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47 | clr token
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48 | rjmp storeTokenAndReturn
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49 |
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50 | ;----------------------------------------------------------------------------
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51 | ; Processing of received packet (numbers in brackets are cycles after center of SE0)
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52 | ;----------------------------------------------------------------------------
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53 | ;This is the only non-error exit point for the software receiver loop
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54 | ;we don't check any CRCs here because there is no time left.
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55 | se0:
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56 | subi cnt, USB_BUFSIZE ;[5]
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57 | neg cnt ;[6]
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58 | sub YL, cnt ;[7]
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59 | sbci YH, 0 ;[8]
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60 | ldi x2, 1<<USB_INTR_PENDING_BIT ;[9]
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61 | USB_STORE_PENDING(x2) ;[10] clear pending intr and check flag later. SE0 should be over.
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62 | ld token, y ;[11]
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63 | cpi token, USBPID_DATA0 ;[13]
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64 | breq handleData ;[14]
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65 | cpi token, USBPID_DATA1 ;[15]
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66 | breq handleData ;[16]
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67 | lds shift, usbDeviceAddr;[17]
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68 | ldd x2, y+1 ;[19] ADDR and 1 bit endpoint number
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69 | lsl x2 ;[21] shift out 1 bit endpoint number
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70 | cpse x2, shift ;[22]
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71 | rjmp ignorePacket ;[23]
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72 | /* only compute endpoint number in x3 if required later */
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73 | #if USB_CFG_HAVE_INTRIN_ENDPOINT || USB_CFG_IMPLEMENT_FN_WRITEOUT
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74 | ldd x3, y+2 ;[24] endpoint number + crc
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75 | rol x3 ;[26] shift in LSB of endpoint
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76 | #endif
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77 | cpi token, USBPID_IN ;[27]
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78 | breq handleIn ;[28]
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79 | cpi token, USBPID_SETUP ;[29]
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80 | breq handleSetupOrOut ;[30]
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81 | cpi token, USBPID_OUT ;[31]
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82 | brne ignorePacket ;[32] must be ack, nak or whatever
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83 | ; rjmp handleSetupOrOut ; fallthrough
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84 |
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85 | ;Setup and Out are followed by a data packet two bit times (16 cycles) after
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86 | ;the end of SE0. The sync code allows up to 40 cycles delay from the start of
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87 | ;the sync pattern until the first bit is sampled. That's a total of 56 cycles.
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88 | handleSetupOrOut: ;[32]
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89 | #if USB_CFG_IMPLEMENT_FN_WRITEOUT /* if we have data for endpoint != 0, set usbCurrentTok to address */
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90 | andi x3, 0xf ;[32]
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91 | breq storeTokenAndReturn ;[33]
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92 | mov token, x3 ;[34] indicate that this is endpoint x OUT
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93 | #endif
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94 | storeTokenAndReturn:
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95 | sts usbCurrentTok, token;[35]
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96 | doReturn:
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97 | POP_STANDARD ;[37] 12...16 cycles
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98 | USB_LOAD_PENDING(YL) ;[49]
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99 | sbrc YL, USB_INTR_PENDING_BIT;[50] check whether data is already arriving
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100 | rjmp waitForJ ;[51] save the pops and pushes -- a new interrupt is already pending
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101 | sofError:
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102 | POP_RETI ;macro call
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103 | reti
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104 |
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105 | handleData:
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106 | #if USB_CFG_CHECK_CRC
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107 | CRC_CLEANUP_AND_CHECK ; jumps to ignorePacket if CRC error
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108 | #endif
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109 | lds shift, usbCurrentTok;[18]
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110 | tst shift ;[20]
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111 | breq doReturn ;[21]
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112 | lds x2, usbRxLen ;[22]
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113 | tst x2 ;[24]
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114 | brne sendNakAndReti ;[25]
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115 | ; 2006-03-11: The following two lines fix a problem where the device was not
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116 | ; recognized if usbPoll() was called less frequently than once every 4 ms.
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117 | cpi cnt, 4 ;[26] zero sized data packets are status phase only -- ignore and ack
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118 | brmi sendAckAndReti ;[27] keep rx buffer clean -- we must not NAK next SETUP
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119 | #if USB_CFG_CHECK_DATA_TOGGLING
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120 | sts usbCurrentDataToken, token ; store for checking by C code
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121 | #endif
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122 | sts usbRxLen, cnt ;[28] store received data, swap buffers
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123 | sts usbRxToken, shift ;[30]
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124 | lds x2, usbInputBufOffset;[32] swap buffers
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125 | ldi cnt, USB_BUFSIZE ;[34]
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126 | sub cnt, x2 ;[35]
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127 | sts usbInputBufOffset, cnt;[36] buffers now swapped
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128 | rjmp sendAckAndReti ;[38] 40 + 17 = 57 until SOP
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129 |
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130 | handleIn:
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131 | ;We don't send any data as long as the C code has not processed the current
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132 | ;input data and potentially updated the output data. That's more efficient
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133 | ;in terms of code size than clearing the tx buffers when a packet is received.
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134 | lds x1, usbRxLen ;[30]
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135 | cpi x1, 1 ;[32] negative values are flow control, 0 means "buffer free"
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136 | brge sendNakAndReti ;[33] unprocessed input packet?
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137 | ldi x1, USBPID_NAK ;[34] prepare value for usbTxLen
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138 | #if USB_CFG_HAVE_INTRIN_ENDPOINT
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139 | andi x3, 0xf ;[35] x3 contains endpoint
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140 | #if USB_CFG_SUPPRESS_INTR_CODE
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141 | brne sendNakAndReti ;[36]
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142 | #else
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143 | brne handleIn1 ;[36]
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144 | #endif
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145 | #endif
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146 | lds cnt, usbTxLen ;[37]
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147 | sbrc cnt, 4 ;[39] all handshake tokens have bit 4 set
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148 | rjmp sendCntAndReti ;[40] 42 + 16 = 58 until SOP
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149 | sts usbTxLen, x1 ;[41] x1 == USBPID_NAK from above
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150 | ldi YL, lo8(usbTxBuf) ;[43]
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151 | ldi YH, hi8(usbTxBuf) ;[44]
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152 | rjmp usbSendAndReti ;[45] 57 + 12 = 59 until SOP
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153 |
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154 | ; Comment about when to set usbTxLen to USBPID_NAK:
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155 | ; We should set it back when we receive the ACK from the host. This would
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156 | ; be simple to implement: One static variable which stores whether the last
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157 | ; tx was for endpoint 0 or 1 and a compare in the receiver to distinguish the
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158 | ; ACK. However, we set it back immediately when we send the package,
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159 | ; assuming that no error occurs and the host sends an ACK. We save one byte
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160 | ; RAM this way and avoid potential problems with endless retries. The rest of
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161 | ; the driver assumes error-free transfers anyway.
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162 |
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163 | #if !USB_CFG_SUPPRESS_INTR_CODE && USB_CFG_HAVE_INTRIN_ENDPOINT /* placed here due to relative jump range */
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164 | handleIn1: ;[38]
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165 | #if USB_CFG_HAVE_INTRIN_ENDPOINT3
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166 | ; 2006-06-10 as suggested by O.Tamura: support second INTR IN / BULK IN endpoint
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167 | cpi x3, USB_CFG_EP3_NUMBER;[38]
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168 | breq handleIn3 ;[39]
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169 | #endif
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170 | lds cnt, usbTxLen1 ;[40]
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171 | sbrc cnt, 4 ;[42] all handshake tokens have bit 4 set
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172 | rjmp sendCntAndReti ;[43] 47 + 16 = 63 until SOP
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173 | sts usbTxLen1, x1 ;[44] x1 == USBPID_NAK from above
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174 | ldi YL, lo8(usbTxBuf1) ;[46]
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175 | ldi YH, hi8(usbTxBuf1) ;[47]
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176 | rjmp usbSendAndReti ;[48] 50 + 12 = 62 until SOP
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177 |
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178 | #if USB_CFG_HAVE_INTRIN_ENDPOINT3
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179 | handleIn3:
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180 | lds cnt, usbTxLen3 ;[41]
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181 | sbrc cnt, 4 ;[43]
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182 | rjmp sendCntAndReti ;[44] 49 + 16 = 65 until SOP
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183 | sts usbTxLen3, x1 ;[45] x1 == USBPID_NAK from above
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184 | ldi YL, lo8(usbTxBuf3) ;[47]
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185 | ldi YH, hi8(usbTxBuf3) ;[48]
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186 | rjmp usbSendAndReti ;[49] 51 + 12 = 63 until SOP
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187 | #endif
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188 | #endif
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