| 1 | (export (version D)
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| 2 | (design
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| 3 | (source /home/adestugues/opensource/avrstuff/ledclock/circuit/ledclock/ledclock.sch)
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| 4 | (date "mar. 21 avril 2020 21:24:21 CEST")
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| 5 | (tool "Eeschema 5.0.2+dfsg1-1")
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| 6 | (sheet (number 1) (name /) (tstamps /)
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| 7 | (title_block
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| 8 | (title)
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| 9 | (company)
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| 10 | (rev)
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| 11 | (date)
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| 12 | (source ledclock.sch)
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| 13 | (comment (number 1) (value ""))
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| 14 | (comment (number 2) (value ""))
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| 15 | (comment (number 3) (value ""))
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| 16 | (comment (number 4) (value "")))))
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| 17 | (components
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| 18 | (comp (ref U1)
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| 19 | (value 74HC595)
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| 20 | (footprint Package_DIP:DIP-16_W7.62mm)
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| 21 | (datasheet http://www.ti.com/lit/ds/symlink/sn74hc595.pdf)
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| 22 | (libsource (lib 74xx) (part 74HC595) (description "8-bit serial in/out Shift Register 3-State Outputs"))
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| 23 | (sheetpath (names /) (tstamps /))
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| 24 | (tstamp 5E9F2D6B))
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| 25 | (comp (ref U2)
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| 26 | (value ULN2003)
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| 27 | (footprint Package_SO:SOIC-16_3.9x9.9mm_P1.27mm)
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| 28 | (datasheet http://www.ti.com/lit/ds/symlink/uln2003a.pdf)
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| 29 | (libsource (lib Transistor_Array) (part ULN2003) (description "High Voltage, High Current Darlington Transistor Arrays, SOIC16/SOIC16W/DIP16/TSSOP16"))
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| 30 | (sheetpath (names /) (tstamps /))
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| 31 | (tstamp 5E9F2F28))
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| 32 | (comp (ref J1)
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| 33 | (value Conn_01x12_Male)
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| 34 | (footprint conn_te_micromatch:TE_MicroMatch_215750-0016_2x08_P1.27mm_Vertical)
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| 35 | (datasheet ~)
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| 36 | (libsource (lib Connector) (part Conn_01x12_Male) (description "Generic connector, single row, 01x12, script generated (kicad-library-utils/schlib/autogen/connector/)"))
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| 37 | (sheetpath (names /) (tstamps /))
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| 38 | (tstamp 5E9F30D8)))
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| 39 | (libparts
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| 40 | (libpart (lib 74xx) (part 74HC595)
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| 41 | (aliases
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| 42 | (alias 74LS595)
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| 43 | (alias 74HCT595))
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| 44 | (description "8-bit serial in/out Shift Register 3-State Outputs")
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| 45 | (docs http://www.ti.com/lit/ds/symlink/sn74hc595.pdf)
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| 46 | (footprints
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| 47 | (fp DIP*W7.62mm*)
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| 48 | (fp SOIC*3.9x9.9mm*P1.27mm*)
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| 49 | (fp TSSOP*4.4x5mm*P0.65mm*)
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| 50 | (fp SOIC*5.3x10.2mm*P1.27mm*)
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| 51 | (fp SOIC*7.5x10.3mm*P1.27mm*))
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| 52 | (fields
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| 53 | (field (name Reference) U)
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| 54 | (field (name Value) 74HC595))
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| 55 | (pins
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| 56 | (pin (num 1) (name QB) (type 3state))
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| 57 | (pin (num 2) (name QC) (type 3state))
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| 58 | (pin (num 3) (name QD) (type 3state))
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| 59 | (pin (num 4) (name QE) (type 3state))
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| 60 | (pin (num 5) (name QF) (type 3state))
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| 61 | (pin (num 6) (name QG) (type 3state))
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| 62 | (pin (num 7) (name QH) (type 3state))
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| 63 | (pin (num 8) (name GND) (type power_in))
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| 64 | (pin (num 9) (name QH') (type output))
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| 65 | (pin (num 10) (name ~SRCLR) (type input))
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| 66 | (pin (num 11) (name SRCLK) (type input))
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| 67 | (pin (num 12) (name RCLK) (type input))
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| 68 | (pin (num 13) (name ~OE) (type input))
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| 69 | (pin (num 14) (name SER) (type input))
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| 70 | (pin (num 15) (name QA) (type 3state))
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| 71 | (pin (num 16) (name VCC) (type power_in))))
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| 72 | (libpart (lib Connector) (part Conn_01x12_Male)
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| 73 | (description "Generic connector, single row, 01x12, script generated (kicad-library-utils/schlib/autogen/connector/)")
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| 74 | (docs ~)
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| 75 | (footprints
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| 76 | (fp Connector*:*_1x??_*))
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| 77 | (fields
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| 78 | (field (name Reference) J)
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| 79 | (field (name Value) Conn_01x12_Male))
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| 80 | (pins
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| 81 | (pin (num 1) (name Pin_1) (type passive))
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| 82 | (pin (num 2) (name Pin_2) (type passive))
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| 83 | (pin (num 3) (name Pin_3) (type passive))
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| 84 | (pin (num 4) (name Pin_4) (type passive))
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| 85 | (pin (num 5) (name Pin_5) (type passive))
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| 86 | (pin (num 6) (name Pin_6) (type passive))
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| 87 | (pin (num 7) (name Pin_7) (type passive))
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| 88 | (pin (num 8) (name Pin_8) (type passive))
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| 89 | (pin (num 9) (name Pin_9) (type passive))
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| 90 | (pin (num 10) (name Pin_10) (type passive))
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| 91 | (pin (num 11) (name Pin_11) (type passive))
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| 92 | (pin (num 12) (name Pin_12) (type passive))))
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| 93 | (libpart (lib Transistor_Array) (part ULN2003)
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| 94 | (aliases
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| 95 | (alias ULN2003A)
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| 96 | (alias ULN2002)
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| 97 | (alias ULN2002A)
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| 98 | (alias ULN2004)
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| 99 | (alias ULN2004A))
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| 100 | (description "High Voltage, High Current Darlington Transistor Arrays, SOIC16/SOIC16W/DIP16/TSSOP16")
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| 101 | (docs http://www.ti.com/lit/ds/symlink/uln2003a.pdf)
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| 102 | (footprints
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| 103 | (fp DIP*W7.62mm*)
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| 104 | (fp SOIC*3.9x9.9mm*P1.27mm*)
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| 105 | (fp SSOP*4.4x5.2mm*P0.65mm*)
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| 106 | (fp TSSOP*4.4x5mm*P0.65mm*)
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| 107 | (fp SOIC*W*5.3x10.2mm*P1.27mm*))
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| 108 | (fields
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| 109 | (field (name Reference) U)
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| 110 | (field (name Value) ULN2003))
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| 111 | (pins
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| 112 | (pin (num 1) (name I1) (type input))
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| 113 | (pin (num 2) (name I2) (type input))
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| 114 | (pin (num 3) (name I3) (type input))
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| 115 | (pin (num 4) (name I4) (type input))
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| 116 | (pin (num 5) (name I5) (type input))
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| 117 | (pin (num 6) (name I6) (type input))
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| 118 | (pin (num 7) (name I7) (type input))
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| 119 | (pin (num 8) (name GND) (type power_in))
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| 120 | (pin (num 9) (name COM) (type passive))
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| 121 | (pin (num 10) (name O7) (type openCol))
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| 122 | (pin (num 11) (name O6) (type openCol))
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| 123 | (pin (num 12) (name O5) (type openCol))
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| 124 | (pin (num 13) (name O4) (type openCol))
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| 125 | (pin (num 14) (name O3) (type openCol))
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| 126 | (pin (num 15) (name O2) (type openCol))
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| 127 | (pin (num 16) (name O1) (type openCol)))))
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| 128 | (libraries
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| 129 | (library (logical 74xx)
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| 130 | (uri /usr/share/kicad/library/74xx.lib))
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| 131 | (library (logical Connector)
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| 132 | (uri /usr/share/kicad/library/Connector.lib))
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| 133 | (library (logical Transistor_Array)
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| 134 | (uri /usr/share/kicad/library/Transistor_Array.lib)))
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| 135 | (nets
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| 136 | (net (code 1) (name "Net-(U1-Pad7)")
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| 137 | (node (ref U1) (pin 7)))
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| 138 | (net (code 2) (name /VCC)
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| 139 | (node (ref U1) (pin 16))
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| 140 | (node (ref U1) (pin 10))
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| 141 | (node (ref J1) (pin 10)))
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| 142 | (net (code 3) (name /GND)
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| 143 | (node (ref U1) (pin 13))
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| 144 | (node (ref U1) (pin 8))
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| 145 | (node (ref J1) (pin 8))
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| 146 | (node (ref U2) (pin 8)))
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| 147 | (net (code 4) (name /SOUT)
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| 148 | (node (ref J1) (pin 9))
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| 149 | (node (ref U1) (pin 9)))
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| 150 | (net (code 5) (name /S7)
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| 151 | (node (ref U2) (pin 10))
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| 152 | (node (ref J1) (pin 7)))
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| 153 | (net (code 6) (name /S6)
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| 154 | (node (ref J1) (pin 6))
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| 155 | (node (ref U2) (pin 11)))
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| 156 | (net (code 7) (name "Net-(U2-Pad9)")
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| 157 | (node (ref U2) (pin 9)))
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| 158 | (net (code 8) (name /S5)
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| 159 | (node (ref U2) (pin 12))
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| 160 | (node (ref J1) (pin 5)))
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| 161 | (net (code 9) (name "Net-(U1-Pad5)")
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| 162 | (node (ref U2) (pin 6))
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| 163 | (node (ref U1) (pin 5)))
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| 164 | (net (code 10) (name "Net-(U1-Pad6)")
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| 165 | (node (ref U2) (pin 7))
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| 166 | (node (ref U1) (pin 6)))
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| 167 | (net (code 11) (name "Net-(U1-Pad4)")
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| 168 | (node (ref U2) (pin 5))
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| 169 | (node (ref U1) (pin 4)))
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| 170 | (net (code 12) (name "Net-(U1-Pad3)")
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| 171 | (node (ref U1) (pin 3))
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| 172 | (node (ref U2) (pin 4)))
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| 173 | (net (code 13) (name "Net-(U1-Pad2)")
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| 174 | (node (ref U1) (pin 2))
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| 175 | (node (ref U2) (pin 3)))
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| 176 | (net (code 14) (name "Net-(U1-Pad15)")
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| 177 | (node (ref U1) (pin 15))
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| 178 | (node (ref U2) (pin 1)))
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| 179 | (net (code 15) (name /S4)
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| 180 | (node (ref J1) (pin 4))
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| 181 | (node (ref U2) (pin 13)))
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| 182 | (net (code 16) (name /S3)
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| 183 | (node (ref U2) (pin 14))
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| 184 | (node (ref J1) (pin 3)))
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| 185 | (net (code 17) (name /S2)
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| 186 | (node (ref U2) (pin 15))
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| 187 | (node (ref J1) (pin 2)))
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| 188 | (net (code 18) (name /SIN)
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| 189 | (node (ref J1) (pin 12))
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| 190 | (node (ref U1) (pin 14)))
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| 191 | (net (code 19) (name /SCLK)
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| 192 | (node (ref J1) (pin 11))
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| 193 | (node (ref U1) (pin 11))
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| 194 | (node (ref U1) (pin 12)))
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| 195 | (net (code 20) (name /S1)
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| 196 | (node (ref J1) (pin 1))
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| 197 | (node (ref U2) (pin 16)))
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| 198 | (net (code 21) (name "Net-(U1-Pad1)")
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| 199 | (node (ref U1) (pin 1))
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| 200 | (node (ref U2) (pin 2)))))
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