Changes between Initial Version and Version 1 of vtech/z80

Timestamp:

Jun 4, 2022, 2:10:35 PM (2 years ago)

Author:

pulkomandy

Comment:

--

vtech/z80

@@ +1 @@
+= Notes on VTech z80 based laptops =
+
+These notes are derived from the work of https://github.com/fraser125/PreTech/blob/main/Schematic/prc1000.pdf who reverse engineered the schematics by tracing pictures of the PCB. The PreComputer 1000 is simple enough and uses standard components, so from this tracing we can learn a lot about how the machine works.
+
+== IO decoding ==
+
+The IO decoding uses A15 and A14 to split the IO space in 4 areas. Officially, the z80 IO space is only 8 bits addresses, but it is well known (and used on other machines) that the IN and OUT instructions set a full 16 bit address with known and reliable behavior.
+
+The decoding is done using the logic ending with IC2B: it detects the IORQ and M1 lines (making sure this is an IN or OUT type instruction) and these two address bits. From there 4 signals are generated:
+
+=== 0xxx-3xxx: Keyboard ===
+
+The keyboard can only be read. Writing to the keyboard using OUT instructions will have no effect, but if keys are pressed, it will short circuit data and address lines through one of the keyboard diodes and the pressed key. This is probably OK for short durations, but should still be avoided.
+
+When reading, the address lines A0-A8 are wired directly to the keyboard matrix lines. So you should set one of these bits (and not more) to 0.
+
+For example, you can use these port numbers:
+
+* 0FFE - line 0 (A0 = 0)
+* 0FFD - line 1 (A1 = 0)
+* 0FFB - line 2 (A2 = 0)
+* 0FF7 - line 3 (A3 = 0)
+* 0FEF - line 4 (A4 = 0)
+* 0FDF - line 5 (A5 = 0)
+* 0FBF - line 6 (A6 = 0)
+* 0F7F - line 7 (A7 = 0)
+* 0EFF - line 8 (A8 = 0)
+
+For each line, the status of 8 keys will be read in the destination register of the IN instruction.
+
+=== 4xxx-7xxx: TODO ===
+
+The address bits A0-A3 are stored in a latch, but it isn't known yet what they are used for (STROBE_A -> IC1A in the schematics)
+
+=== 8xxx-Bxxx: Memory banks configuration ===
+
+Only OUT instructions are allowed. IN instructions will leave the memory configured in an unknown state.
+
+4 data bits are used:
+
+* D0: Low memory bank selection
+* D1, D2: High memory bank selection
+* D3: Cartridge enable