ledclock/circuit/ledclock/ledclock-cache.lib

EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74xx_74HC595
#
DEF 74xx_74HC595 U 0 20 Y Y 1 F N
F0 "U" -300 550 50 H V C CNN
F1 "74xx_74HC595" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS595 74HCT595
$FPLIST
 DIP*W7.62mm*
 SOIC*3.9x9.9mm*P1.27mm*
 TSSOP*4.4x5mm*P0.65mm*
 SOIC*5.3x10.2mm*P1.27mm*
 SOIC*7.5x10.3mm*P1.27mm*
$ENDFPLIST
DRAW
S -300 500 300 -600 1 1 10 f
X QB 1 400 300 100 L 50 50 1 0 T
X ~SRCLR 10 -400 100 100 R 50 50 1 0 I
X SRCLK 11 -400 200 100 R 50 50 1 0 I
X RCLK 12 -400 -100 100 R 50 50 1 0 I
X ~OE 13 -400 -200 100 R 50 50 1 0 I
X SER 14 -400 400 100 R 50 50 1 0 I
X QA 15 400 400 100 L 50 50 1 0 T
X VCC 16 0 600 100 D 50 50 1 0 W
X QC 2 400 200 100 L 50 50 1 0 T
X QD 3 400 100 100 L 50 50 1 0 T
X QE 4 400 0 100 L 50 50 1 0 T
X QF 5 400 -100 100 L 50 50 1 0 T
X QG 6 400 -200 100 L 50 50 1 0 T
X QH 7 400 -300 100 L 50 50 1 0 T
X GND 8 0 -700 100 U 50 50 1 0 W
X QH' 9 400 -500 100 L 50 50 1 0 O
ENDDRAW
ENDDEF
#
# Connector_Conn_01x12_Male
#
DEF Connector_Conn_01x12_Male J 0 40 Y N 1 F N
F0 "J" 0 600 50 H V C CNN
F1 "Connector_Conn_01x12_Male" 0 -700 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -595 0 -605 1 1 6 F
S 34 -495 0 -505 1 1 6 F
S 34 -395 0 -405 1 1 6 F
S 34 -295 0 -305 1 1 6 F
S 34 -195 0 -205 1 1 6 F
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
S 34 205 0 195 1 1 6 F
S 34 305 0 295 1 1 6 F
S 34 405 0 395 1 1 6 F
S 34 505 0 495 1 1 6 F
P 2 1 1 6 50 -600 34 -600 N
P 2 1 1 6 50 -500 34 -500 N
P 2 1 1 6 50 -400 34 -400 N
P 2 1 1 6 50 -300 34 -300 N
P 2 1 1 6 50 -200 34 -200 N
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
P 2 1 1 6 50 200 34 200 N
P 2 1 1 6 50 300 34 300 N
P 2 1 1 6 50 400 34 400 N
P 2 1 1 6 50 500 34 500 N
X Pin_1 1 200 500 150 L 50 50 1 1 P
X Pin_10 10 200 -400 150 L 50 50 1 1 P
X Pin_11 11 200 -500 150 L 50 50 1 1 P
X Pin_12 12 200 -600 150 L 50 50 1 1 P
X Pin_2 2 200 400 150 L 50 50 1 1 P
X Pin_3 3 200 300 150 L 50 50 1 1 P
X Pin_4 4 200 200 150 L 50 50 1 1 P
X Pin_5 5 200 100 150 L 50 50 1 1 P
X Pin_6 6 200 0 150 L 50 50 1 1 P
X Pin_7 7 200 -100 150 L 50 50 1 1 P
X Pin_8 8 200 -200 150 L 50 50 1 1 P
X Pin_9 9 200 -300 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Transistor_Array_ULN2003
#
DEF Transistor_Array_ULN2003 U 0 20 Y Y 1 F N
F0 "U" 0 625 50 H V C CNN
F1 "Transistor_Array_ULN2003" 0 550 50 H V C CNN
F2 "" 50 -550 50 H I L CNN
F3 "" 100 -200 50 H I C CNN
ALIAS ULN2003A ULN2002 ULN2002A ULN2004 ULN2004A
$FPLIST
 DIP*W7.62mm*
 SOIC*3.9x9.9mm*P1.27mm*
 SSOP*4.4x5.2mm*P0.65mm*
 TSSOP*4.4x5mm*P0.65mm*
 SOIC*W*5.3x10.2mm*P1.27mm*
$ENDFPLIST
DRAW
C -70 200 10 0 1 0 N
C -50 -90 10 0 1 0 F
C -50 0 10 0 1 0 F
C -50 100 10 0 1 0 F
C -20 200 10 0 1 0 F
S -300 -500 300 500 0 1 10 f
P 2 0 1 0 -180 200 -140 200 N
P 2 0 1 0 -60 200 160 200 N
P 2 0 1 0 0 265 -40 265 N
P 3 0 1 0 -20 200 -20 400 115 400 N
P 4 0 1 0 -140 240 -140 160 -80 200 -140 240 N
P 4 0 1 0 0 235 -40 235 -20 265 0 235 N
X I1 1 -400 200 100 R 50 50 1 1 I
X O7 10 400 -400 100 L 50 50 1 1 C
X O6 11 400 -300 100 L 50 50 1 1 C
X O5 12 400 -200 100 L 50 50 1 1 C
X O4 13 400 -100 100 L 50 50 1 1 C
X O3 14 400 0 100 L 50 50 1 1 C
X O2 15 400 100 100 L 50 50 1 1 C
X O1 16 400 200 100 L 50 50 1 1 C
X I2 2 -400 100 100 R 50 50 1 1 I
X I3 3 -400 0 100 R 50 50 1 1 I
X I4 4 -400 -100 100 R 50 50 1 1 I
X I5 5 -400 -200 100 R 50 50 1 1 I
X I6 6 -400 -300 100 R 50 50 1 1 I
X I7 7 -400 -400 100 R 50 50 1 1 I
X GND 8 0 -600 100 U 50 50 1 1 W
X COM 9 400 400 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library