(export (version D) | |
(design | |
(source /home/adestugues/opensource/avrstuff/ledclock/circuit/ledclock/ledclock.sch) | |
(date "mar. 21 avril 2020 21:24:21 CEST") | |
(tool "Eeschema 5.0.2+dfsg1-1") | |
(sheet (number 1) (name /) (tstamps /) | |
(title_block | |
(title) | |
(company) | |
(rev) | |
(date) | |
(source ledclock.sch) | |
(comment (number 1) (value "")) | |
(comment (number 2) (value "")) | |
(comment (number 3) (value "")) | |
(comment (number 4) (value ""))))) | |
(components | |
(comp (ref U1) | |
(value 74HC595) | |
(footprint Package_DIP:DIP-16_W7.62mm) | |
(datasheet http://www.ti.com/lit/ds/symlink/sn74hc595.pdf) | |
(libsource (lib 74xx) (part 74HC595) (description "8-bit serial in/out Shift Register 3-State Outputs")) | |
(sheetpath (names /) (tstamps /)) | |
(tstamp 5E9F2D6B)) | |
(comp (ref U2) | |
(value ULN2003) | |
(footprint Package_SO:SOIC-16_3.9x9.9mm_P1.27mm) | |
(datasheet http://www.ti.com/lit/ds/symlink/uln2003a.pdf) | |
(libsource (lib Transistor_Array) (part ULN2003) (description "High Voltage, High Current Darlington Transistor Arrays, SOIC16/SOIC16W/DIP16/TSSOP16")) | |
(sheetpath (names /) (tstamps /)) | |
(tstamp 5E9F2F28)) | |
(comp (ref J1) | |
(value Conn_01x12_Male) | |
(footprint conn_te_micromatch:TE_MicroMatch_215750-0016_2x08_P1.27mm_Vertical) | |
(datasheet ~) | |
(libsource (lib Connector) (part Conn_01x12_Male) (description "Generic connector, single row, 01x12, script generated (kicad-library-utils/schlib/autogen/connector/)")) | |
(sheetpath (names /) (tstamps /)) | |
(tstamp 5E9F30D8))) | |
(libparts | |
(libpart (lib 74xx) (part 74HC595) | |
(aliases | |
(alias 74LS595) | |
(alias 74HCT595)) | |
(description "8-bit serial in/out Shift Register 3-State Outputs") | |
(docs http://www.ti.com/lit/ds/symlink/sn74hc595.pdf) | |
(footprints | |
(fp DIP*W7.62mm*) | |
(fp SOIC*3.9x9.9mm*P1.27mm*) | |
(fp TSSOP*4.4x5mm*P0.65mm*) | |
(fp SOIC*5.3x10.2mm*P1.27mm*) | |
(fp SOIC*7.5x10.3mm*P1.27mm*)) | |
(fields | |
(field (name Reference) U) | |
(field (name Value) 74HC595)) | |
(pins | |
(pin (num 1) (name QB) (type 3state)) | |
(pin (num 2) (name QC) (type 3state)) | |
(pin (num 3) (name QD) (type 3state)) | |
(pin (num 4) (name QE) (type 3state)) | |
(pin (num 5) (name QF) (type 3state)) | |
(pin (num 6) (name QG) (type 3state)) | |
(pin (num 7) (name QH) (type 3state)) | |
(pin (num 8) (name GND) (type power_in)) | |
(pin (num 9) (name QH') (type output)) | |
(pin (num 10) (name ~SRCLR) (type input)) | |
(pin (num 11) (name SRCLK) (type input)) | |
(pin (num 12) (name RCLK) (type input)) | |
(pin (num 13) (name ~OE) (type input)) | |
(pin (num 14) (name SER) (type input)) | |
(pin (num 15) (name QA) (type 3state)) | |
(pin (num 16) (name VCC) (type power_in)))) | |
(libpart (lib Connector) (part Conn_01x12_Male) | |
(description "Generic connector, single row, 01x12, script generated (kicad-library-utils/schlib/autogen/connector/)") | |
(docs ~) | |
(footprints | |
(fp Connector*:*_1x??_*)) | |
(fields | |
(field (name Reference) J) | |
(field (name Value) Conn_01x12_Male)) | |
(pins | |
(pin (num 1) (name Pin_1) (type passive)) | |
(pin (num 2) (name Pin_2) (type passive)) | |
(pin (num 3) (name Pin_3) (type passive)) | |
(pin (num 4) (name Pin_4) (type passive)) | |
(pin (num 5) (name Pin_5) (type passive)) | |
(pin (num 6) (name Pin_6) (type passive)) | |
(pin (num 7) (name Pin_7) (type passive)) | |
(pin (num 8) (name Pin_8) (type passive)) | |
(pin (num 9) (name Pin_9) (type passive)) | |
(pin (num 10) (name Pin_10) (type passive)) | |
(pin (num 11) (name Pin_11) (type passive)) | |
(pin (num 12) (name Pin_12) (type passive)))) | |
(libpart (lib Transistor_Array) (part ULN2003) | |
(aliases | |
(alias ULN2003A) | |
(alias ULN2002) | |
(alias ULN2002A) | |
(alias ULN2004) | |
(alias ULN2004A)) | |
(description "High Voltage, High Current Darlington Transistor Arrays, SOIC16/SOIC16W/DIP16/TSSOP16") | |
(docs http://www.ti.com/lit/ds/symlink/uln2003a.pdf) | |
(footprints | |
(fp DIP*W7.62mm*) | |
(fp SOIC*3.9x9.9mm*P1.27mm*) | |
(fp SSOP*4.4x5.2mm*P0.65mm*) | |
(fp TSSOP*4.4x5mm*P0.65mm*) | |
(fp SOIC*W*5.3x10.2mm*P1.27mm*)) | |
(fields | |
(field (name Reference) U) | |
(field (name Value) ULN2003)) | |
(pins | |
(pin (num 1) (name I1) (type input)) | |
(pin (num 2) (name I2) (type input)) | |
(pin (num 3) (name I3) (type input)) | |
(pin (num 4) (name I4) (type input)) | |
(pin (num 5) (name I5) (type input)) | |
(pin (num 6) (name I6) (type input)) | |
(pin (num 7) (name I7) (type input)) | |
(pin (num 8) (name GND) (type power_in)) | |
(pin (num 9) (name COM) (type passive)) | |
(pin (num 10) (name O7) (type openCol)) | |
(pin (num 11) (name O6) (type openCol)) | |
(pin (num 12) (name O5) (type openCol)) | |
(pin (num 13) (name O4) (type openCol)) | |
(pin (num 14) (name O3) (type openCol)) | |
(pin (num 15) (name O2) (type openCol)) | |
(pin (num 16) (name O1) (type openCol))))) | |
(libraries | |
(library (logical 74xx) | |
(uri /usr/share/kicad/library/74xx.lib)) | |
(library (logical Connector) | |
(uri /usr/share/kicad/library/Connector.lib)) | |
(library (logical Transistor_Array) | |
(uri /usr/share/kicad/library/Transistor_Array.lib))) | |
(nets | |
(net (code 1) (name "Net-(U1-Pad7)") | |
(node (ref U1) (pin 7))) | |
(net (code 2) (name /VCC) | |
(node (ref U1) (pin 16)) | |
(node (ref U1) (pin 10)) | |
(node (ref J1) (pin 10))) | |
(net (code 3) (name /GND) | |
(node (ref U1) (pin 13)) | |
(node (ref U1) (pin 8)) | |
(node (ref J1) (pin 8)) | |
(node (ref U2) (pin 8))) | |
(net (code 4) (name /SOUT) | |
(node (ref J1) (pin 9)) | |
(node (ref U1) (pin 9))) | |
(net (code 5) (name /S7) | |
(node (ref U2) (pin 10)) | |
(node (ref J1) (pin 7))) | |
(net (code 6) (name /S6) | |
(node (ref J1) (pin 6)) | |
(node (ref U2) (pin 11))) | |
(net (code 7) (name "Net-(U2-Pad9)") | |
(node (ref U2) (pin 9))) | |
(net (code 8) (name /S5) | |
(node (ref U2) (pin 12)) | |
(node (ref J1) (pin 5))) | |
(net (code 9) (name "Net-(U1-Pad5)") | |
(node (ref U2) (pin 6)) | |
(node (ref U1) (pin 5))) | |
(net (code 10) (name "Net-(U1-Pad6)") | |
(node (ref U2) (pin 7)) | |
(node (ref U1) (pin 6))) | |
(net (code 11) (name "Net-(U1-Pad4)") | |
(node (ref U2) (pin 5)) | |
(node (ref U1) (pin 4))) | |
(net (code 12) (name "Net-(U1-Pad3)") | |
(node (ref U1) (pin 3)) | |
(node (ref U2) (pin 4))) | |
(net (code 13) (name "Net-(U1-Pad2)") | |
(node (ref U1) (pin 2)) | |
(node (ref U2) (pin 3))) | |
(net (code 14) (name "Net-(U1-Pad15)") | |
(node (ref U1) (pin 15)) | |
(node (ref U2) (pin 1))) | |
(net (code 15) (name /S4) | |
(node (ref J1) (pin 4)) | |
(node (ref U2) (pin 13))) | |
(net (code 16) (name /S3) | |
(node (ref U2) (pin 14)) | |
(node (ref J1) (pin 3))) | |
(net (code 17) (name /S2) | |
(node (ref U2) (pin 15)) | |
(node (ref J1) (pin 2))) | |
(net (code 18) (name /SIN) | |
(node (ref J1) (pin 12)) | |
(node (ref U1) (pin 14))) | |
(net (code 19) (name /SCLK) | |
(node (ref J1) (pin 11)) | |
(node (ref U1) (pin 11)) | |
(node (ref U1) (pin 12))) | |
(net (code 20) (name /S1) | |
(node (ref J1) (pin 1)) | |
(node (ref U2) (pin 16))) | |
(net (code 21) (name "Net-(U1-Pad1)") | |
(node (ref U1) (pin 1)) | |
(node (ref U2) (pin 2))))) |